![]() ![]() Truth Table AND gate using NAND gate OR gate using NAND gate. There is the following expression of the 4-input NAND gate: If the number of inputs required is odd, any "unused" input can be held high by directly connecting it to the power supply using high "suitable" pull-up resistors. ![]() Just like AND, NOT, and OR gate, we can also form n-input NAND gate. The truth table and logic design are given below: There are 2 3=8 possible combinations of inputs. The NAND gate can be cascaded together to form any number of individual inputs. The Boolean expression of the logic NAND gate is defined as the binary operation dot(.). Unlike the 2-input NAND gate, the 3-input NAND gate has three inputs. There are 2 2=4 possible combinations of inputs. In this type of NAND gate, there are only two input values and an output value. Here, the p-type diffusion area for the PMOS transistors and the n-type diffusion area for the NMOS transistors are aligned in parallel to allow simple routing of the gate signals with two parallel polysilicon lines running vertically. This is the simple formation of the NAND gate. These are the following types of AND gate: The 2-input NAND Gate The NAND gate is also classified into three types based on the input it takes. The value of Y will be true when any one of the input is set to 0. The logic or Boolean expression for the NAND gate is the complement of logical multiplication of inputs denoted by a full stop or a single dot as Simply, this gate returns the complement result of the AND gate. A NAND gate circuit is almost identical to an AND gate circuit. The output state of the NAND gate will be low only when all the inputs are high. It’s easy enough to create a NAND gate by using just two transistors. The NAND gate is the combination of the NOT-AND gate. It means all the basic gates such as AND, OR, and NOT gate can be constructed using a NAND gate. Note that your second one only works with open-collector or open-drain signals, if you try to feed positive voltage into it, the base-emitter junction will pull way too much current - since a simple series resistor in front of the base would prevent that nicely, I guess this diagram was made either by an amateur, or lifted from a larger project where the inputs were guaranteed to be fed from open-drain outputs by design.The NAND gate is a special type of logic gate in the digital logic circuit. You cant do that with using only AND gates. You can make any logic function using only NAND gates or using only NOR gates. When one transistor turns off, it ceases preventing the other one from turning on, so the other one turns on and the latch state is thus flipped. at 21:47 NAND and NOR are popular because theyre universal gates. The inputs going high turns off the adjacent transistor in the first one, and inputs going low turns off a transistor in the second one. Still works fine for discrete component projects though, when you only need one or two gates and don't want to have to source the appropriate chip - I've got one in this E-fuse design for example )Īnyway, both of your diagrams are a basic RTL bistable latch. RTL was briefly used back in the '60s, but went out of fashion very quickly due to its numerous deficiencies vs other IC construction techniques. The resistors are doing a lot of work in those, essentially acting as voltage-based current switches with the transistors proper working on the resulting currents. ![]()
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